Germanium is a commonly known semiconductor material. The electron mobility and hole mobility of germanium are greater than that of silicon, hence making germanium an excellent material in the formation of integrated circuits. However, in the past, silicon gained more popularity since its oxide (silicon oxide) is readily usable in the gate dielectric of metal-oxide-semiconductor (MOS) transistors. The gate dielectrics of the MOS transistors can be conveniently formed by thermal oxidation of silicon substrates. The oxide of germanium, on the other hand, is soluble in water, and hence is not suitable for the formation of gate dielectrics.
With the use of high-k dielectric materials in the gate dielectrics of MOS transistors, the convenience provided by the silicon oxide is no longer a big advantage, and hence germanium is reexamined for use in integrated circuits. Recent studies of germanium focusing on germanium nano-wires, which are used in Fin field-effect transistors (FinFETs), have been reported.
A challenge faced by the semiconductor industry is that to reduce the leakage of MOS transistors and to increase the drive currents of germanium FinFETs, germanium-on-insulator (GOI) structures need to be formed. However, the price of GOI substrates (and strained GOI (SGOI) substrates) is many times higher than that of silicon substrates, and it is not practical for foundries to buy GOI substrates or SGOI substrates.
Methods for forming germanium layers on bulk silicon have also been explored. For example, methods for forming germanium layers or nano-wires on bulk silicon using two-dimensional (2D) or three-dimensional (3D) condensations have been reported. There are two ways of forming germanium layers. One way is to form a silicon germanium layer on a bulk silicon substrate. This method incurs a lower cost. However, since 2D and 3D condensations require high temperatures, for example, 1000° C. or above, to incur the move of silicon to the surface of the silicon germanium layer, germanium atoms will penetrate into the bulk silicon substrate. As a result, the germanium concentration in the bulk silicon substrate is graded, and pure germanium layers cannot be formed.
On the other hand, if the 2D and/or 3D condensations are started from a substrate including a silicon germanium (SiGe) layer on a buried oxide layer (BOX), which is further on a silicon substrate, the downward movement of germanium may be blocked by the BOX, and substantially pure germanium nano-wires can be formed. However, the substrate having the SiGe/BOX/silicon structure is very expensive, and hence this method is still not practical in the mass production of integrated circuits.
What are needed in the art, therefore, are formation methods and structures thereof that incorporate germanium to take advantage of the benefits associated with the high electron mobility and hole mobility while at the same time not incurring the high cost.